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Dual-Phase, Quick-PWM Controller
for IMVP6+ CPU Core Power Supplies
Pin Description
PIN
1
NAME
PWRGD
FUNCTION
Open-Drain Power-Good Output. After output voltage transitions, except during power-up and power-
down, if FB is in regulation, then PWRGD is high impedance. PWRGD is low during startup,
continues to be low while the output is at the boot voltage, and stays low until 5ms (typ) after
CLKENgoes low, after which it starts monitoring the FB voltage and goes high if FB is within the
PWRGD threshold window. PWRGD is forced low during soft-shutdown and while in shutdown.
PWRGD is forced high impedance whenever the slew-rate controller is active (output voltage
transitions), and continues to be forced high impedance for an additional 20 μs after the transition
is completed. The PWRGD upper threshold is blanked during any downward output voltage
transition that happens when the controller is in skip mode, and stays blanked until the slew-rate-
controlled internal-transition-related PWRGD blanking period is complete and the output reaches
regulation. A pullup resistor on PWRGD causes additional finite shutdown current.
Power-State Indicator. This low-voltage logic input indicates power usage and sets the operating
mode together with DPRSLPVR as shown in the truth table below. While DPRSLPVR is low, if PSI is
forced low, the controller is immediately set to 1-phase forced-PWM mode. The controller returns to
2-phase forced-PWM mode when PSI is forced high.
DPRSLPVR
1
1
PSI
0
1
Mode
Very low current (1-phase skip)
Low current (approx 3A) (1-phase skip)
2
PSI
0
0
0
1
Intermediate power potential (1-phase PWM)
Max power potential (full-phase PWM: 2-phase or 1-phase as set by user at
CSP2)
The controller is in 2-phase skip mode during startup, but is in 2-phase forced-PWM mode during
soft-shutdown, irrespective of the DPRSLPVR and PSI logic levels. The controller is also in 2-phase
skip mode while in boot mode, but is in 2-phase forced-PWM mode during the transition from boot
mode to VID mode, irrespective of the DPRSLPVR and PSI logic levels. However, if phase 2 is
disabled by connecting CSP2 to V CC , then only phase 1 is active in the above modes.
Power Monitor Output:
V(PWR) = K PWR x V(OUTS, GNDS) x V(CSPAVG, CSN)/V(TIME, ILIM)
where K PWR = 21.25 typical.
3
4
5
6
PMON
THRM
VRHOT
NTC
If ILIM is externally connected to a 5V rail to enable the internal default/preset current-limit
threshold, then the V(TIME, ILIM) value to be used in the above equation is 225mV.
Do not use the power monitor in any configuration that would cause its output V(PMON) to exceed
(V CC - 0.5V).
PMON is pulled to ground when the MAX17410 is in shutdown.
Resistive Input of Thermal Comparator. Connect a resistor to ground to set the VRHOT threshold.
THRM and NTC have matched 50 μA current sources, so the resistance value = the NTC
resistance at the desired high temperature. VRHOT is pulled low when the voltage at NTC goes
below the voltage at THRM.
Open-Drain Output of Internal Comparator. VRHOT is pulled low when the voltage at NTC goes
below the voltage at THRM. VRHOT is high impedance in shutdown.
Thermistor Input of Thermal Comparator. Connect a standard thermistor to ground. THRM and NTC
have matched 50 μA current sources, so the resistance value = the NTC resistance at the desired
high temperature. VRHOT is pulled low when the voltage at NTC goes below the voltage at THRM.
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相关代理商/技术参数
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